PCIe switch project, part 3a, the first traces

Mar 26, 2025 6:05 PM

LTC3376 8-phase 4 channel sync buck with integrated fets. It will provide the 4 power rails for the switch IC

Baby's first wraps.
Found out I'm gonna need a 2nd wrap tool for the very short runs. Live and learn :)

The solder seen on some pins is for "ground committed" pins. A small copper washer under the solder, bridges the pin to the ground plane. I really like this board for that feature.

So far wire wrap is pretty fun and quite cathartic.

Edit: forgot to specify that this is a prototype build intended to confirm functionality and compatibility prior to a full PCB design

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Upvotes for wire wrap!

4 months ago | Likes 2 Dislikes 0

Next time, draw within the lines.

4 months ago | Likes 2 Dislikes 3

that seems not standard conform

4 months ago | Likes 3 Dislikes 1

Is this like a KVM switch, but for PCIe devices? Will the host just see it as being disconnected/reconnected when it switches between them?

4 months ago | Likes 2 Dislikes 0

It's a packet switch. Multiple downstream devices can be attached to a single upstream root port, through the switch. The devices can be used simultaneously, and can bypass the root port when communicating with each other. In this use case I'm using it to attach multiple gen3 devices to the single root port of the RPi5.

4 months ago | Likes 5 Dislikes 0

that seems extremely not standard conform, how do you get that to work at all? or is there some barely used PCI port replication standard i dont know about?

4 months ago | Likes 1 Dislikes 0

4 months ago | Likes 1 Dislikes 0

this is my current PiNAS configuration. The switch shows up as 3 pcieroot ports, 1 for upstream and 2 for downstream. The downstream ports use the same pcieport kernel driver as a typical root port, so to the OS it's just another free root port.

4 months ago | Likes 1 Dislikes 0

What kind of devices are you connecting to the RPi?

4 months ago | Likes 2 Dislikes 0

For my uses, a 10G NIC and SAS controller (X710, 9400-8i), for an embedded, but very expandable NAS. This project is a spin off of my previous here: /gallery/yNCFgby
Though I also just want to build the first gen3 pcie switch HAT for the pi5 . I know of one company working on a CM5 (pi5 compute module) I/O board with SATA, 5GbE and an x1 slot, using a gen3 1:1:1:1 switch, but w/e still a fun experience and maybe I'll beat them to it ;)

4 months ago | Likes 2 Dislikes 0